a self-contained audio preamplifier ssm2017 one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 617/329-4700 fax: 617/326-8703 functional block diagram +in ?n out 5k w reference rg 1 ssm2017 v+ x1 rg 2 v x1 v 5k w 5k w 5k w 5k w 5k w pin connections epoxy mini-dip (p suffix) reference 1 2 3 4 8 7 6 5 top view (not to scale) ?n +in v v+ out rg 2 rg 1 ssm2017 16-pin wide body sol (s suffix) 1 2 3 4 5 6 7 8 top view (not to scale) 16 15 14 13 12 11 10 9 nc nc ?n +in v v+ out reference nc nc nc nc rg 1 rg 2 nc nc ssm2017 nc = no connect top view (not to scale) features excellent noise performance: 950 pv/ ? hz or 1.5 db noise figure ultralow thd: < 0.01% @ g = 100 over the full audio band wide bandwidth: 1 mhz @ g = 100 high slew rate: 17 v/ m s typ unity gain stable true differential inputs subaudio 1/f noise corner 8-pin mini-dip with only one external component required very low cost extended temperature range: C40 8 c to +85 8 c applications audio mix consoles intercom/paging systems two-way radio sonar digital audio systems general description the ssm2017 is a latest generation audio preamplifier combin- ing ssm preamplifier design expertise with advanced process- ing. the result is excellent audio performance from a self- contained 8-pin mini-dip device, requiring only one external gain set resistor or potentiometer. the ssm2017 is further en- hanced by its unity gain stability. key specifications include ultralow noise (1.5 db noise figure) and thd (<0.01% at g = 100), complemented by wide band- width and high slew rate. applications for this low cost device include microphone pream- plifiers and bus summing amplifiers in professional and con- sumer audio equipment, sonar, and other applications requiring a low noise instrumentation amplifier with high gain capability. rev. b information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. obsolete
ssm2017Cspecifications (v s = 6 15 v and C40 8 c t a +85 8 c, unless otherwise noted. typical speci- fications apply at t a = +25 8 c.) parameter symbol conditions min typ max units distortion performance t a = +25 c v o = 7 v rms r l = 5 k w total harmonic distortion plus noise thd+n g = 1000, f = 1 khz 0.012 % g = 100, f = 1 khz 0.005 % g = 10, f = 1 khz 0.004 % g = 1, f = 1 khz 0.008 % noise performance input referred voltage noise density e n f = 1 khz, g = 1000 0.95 nv/ ? hz f = 1 khz; g = 100 1.95 nv/ ? hz f = 1 khz; g = 10 11.83 nv/ ? hz f = 1 khz; g = 1 107.14 nv/ ? hz input current noise density i n f = 1 khz, g = 1000 2 pa/ ? hz dynamic response slew rate sr g = 10 10 17 v/ m s r l = 4.7 k w c l = 50 pf t a = +25 c small signal bandwidth bw C3 db g = 1000 200 khz g = 100 1000 khz g = 10 2000 khz g = 1 4000 khz input input offset voltage v ios 0.1 1.2 mv input bias current i b v cm = 0 v 6 25 m a input offset current ios v cm = 0 v 0.002 2.5 m a common-mode rejection cmr v cm = 8 v g = 1000 80 112 db g = 100 60 92 db g = 10 40 74 db g = 1, t a = +25 c2654db g = 1, t a = C 40 c to +85 c2054 db power supply rejection psr v s = 6 v to 18 v g = 1000 80 124 db g = 100 60 118 db g = 10 40 101 db g = 1 26 82 db input voltage range ivr 8v input resistance r in differential, g = 1000 1 m w g = 1 30 m w common mode, g = 1000 5.3 m w g = 1 7.1 m w output output voltage swing v o r l = 2 k w ; t a = +25 c 11.0 12.3 v output offset voltage v oos C40 500 mv minimum resistive load drive t a = +25 c2k w t a = C40 c to +85 c 4.7 k w maximum capacitive load drive 50 pf short circuit current limit i sc output-to-ground short 50 ma output short circuit duration 10 sec gain gain accuracy r g = 10 k w t a = +25 c g C 1 r g = 10 w , g = 1000 0.25 1 db r g = 101 w , g = 100 0.20 1 db r g = 1.1 k w , g = 10 0.20 1 db r g = ` , g = 1 0.05 0.5 db maximum gain g 70 db reference input input resistance 10 k w voltage range 8v gain to output 1 v/v power supply supply voltage range v s 6 22 v supply current i sy v cm = 0 v, r l = ` 10.6 14.0 ma specifications subject to change without notice. rev. b C2C obsolete
ssm2017 C3C rev. b warning! esd sensitive device caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the ssm2017 features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. typical performance characteristics figure 1. typical thd+noise* at g = 1, 10, 100, 1000; v o = 7 v rms , v s = 15 v, r l = 5 k w ; t a = +25 c *80 khz low-pass filter used for figures 1-2. absolute maximum ratings supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 v input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . supply voltage output short circuit duration . . . . . . . . . . . . . . . . . . . 10 sec storage temperature range (p, z packages) C65 c to +150 c junction temperature (t j ) . . . . . . . . . . . . . C65 c to +150 c lead temperature range (soldering, 60 sec) . . . . . . . . 300 c operating temperature range . . . . . . . . . . . . C40 c to +85 c thermal resistance* 8-pin hermetic dip (z): q ja = 134; q jc = 12 . . . . . . c/w 8-pin plastic dip (p): q ja = 96; q jc = 37 . . . . . . . . . . c/w 16-pin soic (s): q ja = 92; q jc = 27 . . . . . . . . . . . . . c/w * q ja is specified for worst case mounting conditions, i.e., q ja is specified for device in socket for cerdip and plastic dip; q ja is specified for device soldered to printed circuit board for sol package. ordering guide temperature package package model range* description option ssm2017p C40 c to +85 c 8-pin plastic dip n-8 ssm2017s C40 c to +85 c 16-lead sol r-16 ssm2017s-reel C40 c to +85 c 16-lead sol r-16 *xind = C40 c to +85 c. figure 2. typical thd+ noise * at g = 2, 10, 100, 1000; v o = 10 v rms , v s = 18 v, r l = 5 k w ; t a = +25 c obsolete
ssm2017 C4C rev. b figure 3. voltage noise density vs. frequency figure 6. maximum output swing vs. frequency figure 9. output voltage range vs. supply voltage figure 4. rti voltage noise density vs. gain figure 7. maximum output voltage vs. load resistance figure 10. cmrr vs. frequency figure 5. output impedance vs. frequency figure 8. input voltage range vs. supply voltage figure 11. +psrr vs. frequency obsolete
ssm2017 C5C rev. b figure 12. Cpsrr vs. frequency figure 15. v oos vs. temperature figure 18. i b vs. supply voltage figure 13. v ios vs. temperature figure 16. v oos vs. supply voltage figure 19. i sy vs. temperature figure 14. v ios vs. supply voltage figure 17. i b vs. temperature figure 20. i sy vs.supply voltage obsolete
ssm2017 C6C rev. b figure 21. bandwidth of the ssm2017 for various values of gain noise performance the ssm2017 is a very low noise audio preamplifier exhibiting a typical voltage noise density of only 1 nv/ ? hz at 1 khz. the exceptionally low noise characteristics of the ssm2017 are in part achieved by operating the input transistors at high collector currents since the voltage noise is inversely proportional to the square root of the collector current. current noise, however, is directly proportional to the square root of the collector current. as a result, the outstanding voltage noise performance of the ssm2017 is obtained at the expense of current noise perfor- mance. at low preamplifier gains, the effect of the ssm2017s voltage and current noise is insignificant. the total noise of an audio preamplifier channel can be calcu- late by: e n = e n 2 + ( i n r s ) 2 + e t 2 where: e n = total input referred noise e n = amplifier voltage noise i n = amplifier current noise r s = source resistance e t = source resistance thermal noise. for a microphone preamplifier, using a typical microphone im- pedance of 150 w the total input referred noise is: e n = 1 nv/ ? hz @ 1 khz, ssm2017 e n i n = 2 pa/ ? hz @ 1 khz, ssm2017 i n r s = 150 w , microphone source impedance e t = 1.6 nv / ? hz @ 1 khz, microphone thermal noise e n = ? (1 nv ? hz ) 2 + 2 ( pa / ? hz 150 w ) 2 + (1.6 nv / ? hz ) 2 = 1.93 nv / ? hz @ 1 khz. this total noise is extremely low and makes the ssm2017 virtually transparent to the user. a v db r g 10nc 3.2 10 4.7k 10 20 1.1k 31.3 30 330 100 40 100 314 50 32 1000 60 10 g = v out (+in) (in) = 10 k v r g ? ? ? ? +1 basic circuit connections gain the ssm2017 only requires a single external resistor to set the voltage gain. the voltage gain, g , is: g = 10 k w r g +1 and r g = 10 k w g 1 for convenience, table i lists various values of r g for common gain levels. table i. values of r g for various gain levels the voltage gain can range from 1 to 3500. a gain set resistor is not required for unity gain applications. metal-film or wire- wound resistors are recommended for best results. the total gain accuracy of the ssm2017 is determined by the tolerance of the external gain set resistor, r g , combined with the gain equation accuracy of the ssm2017. total gain drift com- bines the mismatch of the external gain set resistor drift with that of the internal resistors (20 ppm/ c typ). bandwidth of the ssm2017 is relatively independent of gain as shown in figure 21. for a voltage gain of 1000, the ssm2017 has a small-signal bandwidth of 200 khz. at unity gain, the bandwidth of the ssm2017 exceeds 4 mhz. obsolete
ssm2017 C7C rev. b figure 23. ssm2017 in phantom powered microphone circuit inputs the ssm2017 has protection diodes across the base emitter junctions of the input transistors. these prevent accidental ava- lanche breakdown which could seriously degrade noise perfor- mance. additional clamp diodes are also provided to prevent the inputs from being forced too far beyond the supplies. a. single ended b. pseudo differential c. true differential figure 22. three ways of interfacing transducers for high noise immunity although the ssm2017s inputs are fully floating, care must be exercised to ensure that both inputs have a dc bias connection capable of maintaining them within the input common-mode range. the usual method of achieving this is to ground one side of the transducer as in figure 22a, but an alternative way is to float the transducer and use two resistors to set the bias point as in figure 22b. the value of these resistors can be up to 10 k w , but they should be kept as small as possible to limit common- mode pickup. noise contribution by resistors themselves is neg- ligible since it is attenuated by the transducers impedance. bal- anced transducers give the best noise immunity and interface directly as in figure 22c. reference terminal the output signal is specified with respect to the reference ter- minal, which is normally connected to analog ground. the ref- erence may also be used for offset correction or level shifting. a reference source resistance will reduce the common-mode rejec- tion by the ratio of 5 k w /r ref . if the reference source resis- tance is 1 w , then the cmr will be reduced to 74 db (5 k w /1 w = 74 db). common-mode rejection ideally, a microphone preamplifier responds only to the differ- ence between the two input signals and rejects common-mode voltages and noise. in practice, there is a small change in output voltage when both inputs experience the same common-mode voltage change; the ratio of these voltages is called the common- mode gain. common-mode rejection (cmr) is the logarithm of the ratio of differential-mode gain to common-mode gain, expressed in db. phantom powering a typical phantom microphone powering circuit is shown in figure 23. z 1 through z 4 provide transient overvoltage protec- tion for the ssm2017 whenever microphones are plugged in or unplugged. obsolete
ssm2017 C8C rev. b c1534C24C4/91 printed in u.s.a. bus summing amplifier in addition to is use as a microphone preamplifier, the ssm2017 can be used as a very low noise summing amplifier. such a cir- cuit is particularly useful when many medium impedance out- puts are summed together to produce a high effective noise gain. the principle of the summing amplifier is to ground the ssm2017 inputs. under these conditions, pins 1 and 8 are ac virtual grounds sitting about 0.55 v below ground. to remove the 0.55 v offset, the circuit of figure 24 is recommended. a 2 forms a servo amplifier feeding the ssm2017s inputs. this places pins l and 8 at a true dc virtual ground. r4 in con- junction with c2 remove the voltage noise of a 2 , and in fact just about any operational amplifier will work well here since it is re- moved from the signal path. if the dc offset at pins l and 8 is not too critical, then the servo loop can be replaced by the diode bi- asing scheme of figure 24. if ac coupling is used throughout, then pins 2 and 3 may be directly grounded. figure 24. bus summing amplifier outline dimensions dimensions shown in inches and (mm). 8-pin plastic dip (p) package 8-pin hermetic dip (z) package 16-pin soic (s) package obsolete
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